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19-1436; Rev 1; 9/99
NUAL KIT MA ATION ET EVALU TA SHE WS DA FOLLO
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches
General Description
The MAX1623 switch-mode buck regulator with synchronous rectification provides local CPU and bus-termination power in notebook and desktop computers. An internal 55m (typ), 3A PMOS power switch and 60m (typ), 3A NMOS synchronous-rectifier switch deliver continuous load currents up to 3A from a 5V supply with 95% typical efficiency. Output accuracy is 1%, including line and load regulation. The MAX1623 features constant-off-time, current-mode pulse-width-modulation (PWM) control with switching frequencies as high as 350kHz. An external resistor at the TOFF pin sets the off-time, allowing optimum design flexibility in terms of switching frequency, output switching noise, and inductor size. This device is available in a space-saving 20-pin SSOP package.
____________________________Features
o 1% Output Accuracy, Including Line and Load Regulation o 94% Efficiency o Internal Switches 55m PMOS Power Switch 60m NMOS Synchronous-Rectifier Switch o Guaranteed 3A Load Capability o Minimal External Components o Pin-Selectable Fixed 3.3V, 2.5V, or Adjustable (1.1V to 3.8V) Output Voltage o +4.5V to +5.5V Input Voltage Range o 400A (typ) Supply Current o <1A Shutdown Supply Current o Constant-Off-Time PWM Operation o Switching Frequencies Up to 350kHz o Idle ModeTM Operation at Light Loads o Thermal Shutdown Protection o Available in 20-Pin SSOP
MAX1623
________________________Applications
5V to 3.3V Conversion Notebook Computer CPU I/O Supply Desktop Computer Bus-Termination Supply CPU Daughter Card Supply DSP Supply
Ordering Information
PART MAX1623EAP TEMP. RANGE -40C to +85C PIN-PACKAGE 20 SSOP
Typical Operating Circuit
TOP VIEW
+5V INPUT +2.5V OUTPUT IN LX
Pin Configuration
LX 1 IN 2
20 LX 19 PGND 18 LX 17 PGND
MAX1623
LX 3
VCC FBSEL SHDN TOFF COMP FB GND REF PGND
IN 4 LX 5 IN 6 SHDN 7 FBSEL 8 TOFF 9 FB 10
MAX1623
16 LX 15 PGND 14 VCC 13 COMP 12 REF 11 GND
SSOP
Idle Mode is a trademark of Maxim Integrated Products.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches MAX1623
ABSOLUTE MAXIMUM RATINGS
IN to PGND .....................................................................0V to 6V VCC to GND ................................................................-0.3V to 6V PGND to GND.....................................................................0.5V IN to VCC .............................................................................0.5V LX to PGND.................................................................-0.5V to 6V SHDN to GND .............................................................-0.3V to 6V REF, FBSEL, COMP, FB, TOFF to GND .....-0.3V to (VCC + 0.3V) REF Short to GND ......................................................Continuous Continuous Power Dissipation (TA = +70C) (with part mounted on 1 sq. inch of one ounce copper) 20-Pin SSOP (derate 22mW/C above +70C) ................1.3W Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VCC = +5V, FBSEL unconnected, RTOFF = 110k, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Input Voltage Range FBSEL = unconnected Output Voltage Output Adjustment Range Reference Output Voltage Reference Load Regulation Current-Limit Threshold PMOS Switch On-Resistance NMOS Switch On-Resistance Maximum Switching Frequency Idle Mode Threshold (Note 2) No-Load Supply Current Shutdown Supply Current LX Leakage Current Thermal Shutdown Threshold Undervoltage Lockout Threshold FB Input Bias Current Error-Amplifier Gain Bandwidth Off-Time Adjustment Range Off-Time Default Period AC Output Load Regulation SHDN Input Current SHDN Input Low Voltage SHDN Input High Voltage 2 FBSEL = GND FBSEL = REF SHDN = GND or VCC -1 VCC falling, 100mV hysteresis FBSEL = GND, adjustable output mode, VFB = 1.2V (Note 1) 4.1 -25 500 0.5 0.85 1.00 1 2 0.03 1 0.8 4 1.15 Does not include switching losses SHDN = GND VIN = 5.5V, VLX = 5.5V or 0 145 4.2 4.3 25 VIN = 4.5V VIN = 4.5V ILOAD 1.5A (Note 1) 1 1.25 400 0.5 VIN = 4.5V to 5.5V, ILOAD = 0 to 3A FBSEL = VCC FBSEL = GND or REF CONDITIONS MIN 4.5 3.296 2.49 1.089 VREF 1.089 3.65 55 60 1.100 3.330 2.525 1.100 TYP MAX 5.5 3.366 2.550 1.110 3.80 1.110 1 4.65 100 100 350 1.5 525 10 20 V V mV A m m kHz A A A A C V nA kHz s s % A V V V UNITS V
FBSEL = GND or REF (Note 1) IREF = 0 IREF = -1A to 10A
2
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3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches
ELECTRICAL CHARACTERISTICS
(VIN = VCC = +5V, FBSEL unconnected, RTOFF = 110k, TA = -40C to +85C, unless otherwise noted.) (Note 3) PARAMETER Input Voltage Range FBSEL = unconnected Output Voltage Output Adjustment Range Reference Output Voltage Current-Limit Threshold PMOS Switch On-Resistance NMOS Switch On-Resistance No-Load Supply Current Shutdown Supply Current LX Leakage Current Undervoltage Lockout Threshold FB Input Bias Current Off-Time Adjustment Range Off-Time Default Period SHDN Input Current SHDN Input Low Voltage SHDN Input High Voltage 2.2 SHDN = GND or VCC VIN = 4.5V VIN = 4.5V Does not include switching losses SHDN = GND VIN = 5.5V, VLX = 5.5V or 0 VCC falling, 100mV hysteresis FBSEL = GND, adjustable output mode, VFB = 1.2V -20 4.0 -50 0.55 0.85 -1 VIN = 4.5V to 5.5V, ILOAD = 0 to 3A FBSEL = VCC FBSEL = GND or REF CONDITIONS MIN 4.5 3.234 2.450 1.075 VREF 1.075 3.5 TYP MAX 5.5 3.366 2.550 1.110 3.8 1.110 4.75 0.1 0.1 600 10 20 4.3 50 4 1.25 1 0.8 V V A A A A V nA s s A V V V UNITS V
MAX1623
FBSEL = GND or REF (Note 1) IREF = 0
Note 1: Guaranteed by design, not production tested. Note 2: Idle Mode threshold is defined as the transition point in the load-current range between Idle Mode and constant-off-time operation. Note 3: Specifications to -40C are guaranteed by design, not production tested.
_______________________________________________________________________________________
3
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches MAX1623
__________________________________________Typical Operating Characteristics
(Circuit of Figure 2, TA = +25C, unless otherwise noted.)
SWITCH OFF-TIME vs. OFF-TIME RESISTANCE
MAX1623 TOC01 MAX1623 TOC02
EFFICIENCY vs. OUTPUT CURRENT
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.001 0.01 0.1 1 10 0 0 1 VOUT = 3.3V, RTOFF = 110k tOFF (s) VOUT = 2.5V, RTOFF = 180k VOUT = 1.1V, RTOFF = 280k 3 5
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX1623 TOC03
1000
4
100 SUPPLY CURRENT (A)
SHDN = IN
10
2
1 SHDN = GND 0.1
0.01 100 200 300 RTOFF (k) 400 500 600 0 1 2 3 4 5 6 INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
SWITCHING FREQUENCY vs. LOAD CURRENT
MAX1623 TOC04
SWITCHING FREQUENCY vs. INPUT VOLTAGE
350 SWITCHING FREQUENCY (kHz) 300 250 200 150 100 50 VIN = 5V, VOUT = 3.3V, RTOFF = 110k VIN = 5V, VOUT = 2.5V, RTOFF = 180k
MAX1623 TOC05
350 300
SWITCHING FREQUENCY (kHz)
VOUT = 1.1V, RTOFF = 280k
400
250 VOUT = 2.5V, RTOFF = 180k 200 150 100 50 0 VOUT = 3.3V, RTOFF = 110k
0
500
1000
1500
2000
2500
3000
0
4.5
4.7
4.9
5.1
5.3
5.5
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
REFERENCE LOAD REGULATION ERROR vs. REFERENCE LOAD CURRENT
MAX1623 TOC06
LOAD REGULATION ERROR vs. LOAD CURRENT
-0.05 LOAD REGULATION ERROR (%) -0.10 -0.15 -0.20 -0.25 -0.30 -0.35 -0.40 -0.45 VOUT = 2.5V, RTOFF = 180k VOUT = 3.3V, RTOFF = 110k
MAX1623 TOC07
0 REFERENCE LOAD REGULATION ERROR (%) -0.01 -0.02 -0.03 TA = -40C -0.04 TA = +85C -0.05 -0.06 0 5 10 15 20 TA = +25C
0
25
-0.50 0.001
0.01
0.1 LOAD CURRENT (A)
1
10
REFERENCE LOAD CURRENT (A)
4
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3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches
____________________________ Typical Operating Characteristics (continued)
(Circuit of Figure 2, TA = +25C, unless otherwise noted.)
LOAD-TRANSIENT RESPONSE (FBSEL = REF)
MAX1623 TOC09 MAX1623 TOC10
MAX1623
START-UP AND SHUTDOWN TRANSIENT
MAX1623 TOC08
START-UP AND SHUTDOWN TRANSIENT
A
A
ILOAD 0 to 3A B B VOUT 50mV AC-COUPLED f = 300kHz 1ms/div VIN = 5V, VOUT = 3.3V, ILOAD = 2A, WAVEFORM AVERAGED A: VOUT, 2V/div B: IIN, 1A/div C: VSHDN, 5V/div 20s/div
C 1ms/div VIN = 5V, VOUT = 3.3V, ILOAD = 3A, WAVEFORM AVERAGED A: VOUT, 2V/div B: IIN, 1A/div C: VSHDN, 5V/div
C
LOAD-TRANSIENT RESPONSE (FBSEL = REF)
MAX1623 TOC11
LINE-TRANSIENT RESPONSE
MAX1623 TOC12
LINE-TRANSIENT RESPONSE
MAX1623 TOC13
VIN = 4.5V to 5.5V AC-COUPLED (1V/div)
VIN = 4.5V to 5.5V AC-COUPLED (1V/div)
ILOAD 0 to 2A VOUT 50mV AC-COUPLED f = 300kHz 20s/div VOUT = 3.3V AC-COUPLED IOUT = 1.5A (20mV/div) VOUT = 3.3V AC-COUPLED IOUT = 100mA (20mV/div)
20s/div
20s/div
_______________________________________________________________________________________
5
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches MAX1623
Pin Description
PIN 1, 3, 5, 16,18, 20 2, 4, 6 7 8 9 NAME LX IN SHDN FBSEL TOFF Connection to the internal power switches. Power Input. Internally connected to the PMOS switch source. Connect to +5V. Active-Low Shutdown Input. Connect to VCC for normal operation. Feedback Select Input. See Table 1. Off-Time Select Input. Connect a resistor from TOFF to GND to adjust the switch off-time, and therefore the frequency: tOFF = R TOFF (s) . See Typical Operating Characteristics. 110k Feedback input for both fixed-output and adjustable operating modes. Connect to the output directly for fixed-voltage operation or to a resistor-divider for adjustable operating modes. Analog Ground Reference Output. Bypass with a minimum 0.1F capacitor to GND. See Internal Reference. Integrator Capacitor Connection. Connect a 470pF (470pF to 2000pF range) capacitor to GND to set the typical integration time-constant. See Integrator Amplifier. Analog Supply-Voltage Input. Supplies internal analog circuitry. Connect to +5V. Bypass VCC with 10 and 4.7F (Figure 2). Power Ground. Internally connected to the NMOS synchronous rectifier source. FUNCTION
10 11 12 13 14 15, 17, 19
FB GND REF COMP VCC PGND
General Description
The MAX1623 current-mode, PWM, DC-DC regulator is designed for 5V-input step-down applications. It features a 55m (typ) PMOS switch and a 60m (typ) NMOS synchronous-rectifier switch. Simple constant-offtime control allows switching frequencies up to 350kHz. Adjust the off-time with an external resistor R TOFF to optimize performance trade-offs among efficiency, component size, output switching noise, and cost. Idle Mode operation enhances light-load efficiency by switching to a pulse-skipping mode that reduces transition and gatecharge losses. The power-switching circuit consists of the IC and an LC output filter. The output voltage is the average of the AC voltage at the switching node (LX). The MAX1623 regulates the output voltage by changing the PMOS switch on-time relative to the constant offtime, thereby adjusting the duty cycle. The MAX1623 contains six major circuit blocks (Figure 1): a PWM comparator, a current-sense circuit, a PWM logic block, an internal feedback mux, an off-time control block, and a 1.1V precision reference. The input supply directly powers the internal blocks.
6
Modes of Operation
The load current determines the mode of operation: Idle Mode (load currents less than 0.625A) or PWM mode for inductor currents of 1.25A (which corresponds to load currents greater than 0.625A). The PWM current limit is continuously adjusted by the PWM comparator and can vary from 0A to the maximum current limit (4A). If the inductor current falls below the Idle Mode threshold (1.25A), skip mode takes over. Whenever the P-channel switch turns on, it stays on until the sensed current reaches the active current limit. The PWM current limit automatically adjusts with the PMOS switch duty cycle required to generate the desired output voltage. When the active current limit is met, the PMOS switch turns off for the programmed minimum off-time, and the N-channel synchronous rectifier turns on. The synchronous rectifier stays on until the P-channel switch turns back on or until the inductor current reaches zero. At the end of the off-time, the Pchannel switch turns on again if the output voltage indicates that energy is required at the output.
_______________________________________________________________________________________
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches MAX1623
VIN 4.5V TO 5.5V FBSEL IN FB FEEDBACK SELECTION COMP REF Gm REF
CURRENT SENSE SKIP PWM LOGIC AND DRIVERS LX
VIN
VCC
MAX1623
SHDN REF CURRENT SENSE PGND
REF GND
TIMER TOFF
NOTE: HEAVY LINES DENOTE HIGH SWITCHING CURRENT PATHS.
Figure 1. Functional Diagram
Idle Mode At light loads, the device goes into skip mode (because the load current is below the skip threshold), and Idle Mode operation (1.25A current limit) begins. This allows both switches to remain off at the end of the off-time, skipping cycles to reduce switching losses. At lighter loads, the inductor current is discontinuous because the inductor current reaches zero. In Idle Mode, the operating frequency varies with output load current. There is no major shift in circuit behavior as the PWM limit falls below the skip limit. The effective offtime simply increases, resulting in a seamless transition between PWM mode and Idle Mode. PWM Mode PWM operation occurs whenever the load current is greater than the skip threshold. In this mode, the PWM comparator adjusts the current limit to the desired output current, so that the P-channel turns on at the end of each off-time.
Three signals are resistively summed at the input of the PWM comparator (Figure 1): an output voltage error signal relative to the reference voltage, an integrated output voltage error correction signal, and the sensed
PMOS switch current. The integrated error signal is provided by a transconductance amplifier with an external capacitor at the COMP pin. This integrator provides high DC accuracy without the need for a highgain error amplifier. Connecting a capacitor at COMP modifies the overall loop response (see Integrator Comparator section).
Setting the Output Voltage
There are two preset output voltages (2.525V and 3.33V), or the output voltage can be adjusted from the reference voltage (nominally 1.1V) up to 3.8V. For a preset output voltage (Figure 2), connect FB to the output voltage, and connect FBSEL to VCC (2.525V output) or leave it unconnected (3.33V output). For an adjustable output, connect FBSEL to GND or REF, and connect FB to the midpoint of a resistor divider between the output voltage and ground (Figure 3). Regulation is maintained when VFB equals VREF. Select R1 in the 10k to 500k range. R2 is given by: R2 = (R1)(VOUT / VREF - 1) where VREF is typically 1.1V.
7
_______________________________________________________________________________________
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches MAX1623
INPUT 4.5V TO 5.5V IN 4.7H LX 10F C1 220F C2 330F 3.3V OUTPUT
MAX1623
PGND SHDN FBSEL 10 VCC 4.7F NOTE: HEAVY LINES DENOTE HIGH SWITCHING CURRENT PATHS. FB COMP REF 0.1F GND TOFF 110k
470pF
Figure 2. Standard 3.3V/3A Application Circuit
Setting the AC Loop Gain
The internal integrator amplifier effectively eliminates any long-term error within the time constant set by the Gm of the transconductance amplifier and the capacitor connected to COMP. However, there remains a short-term load-regulation error in response to load current changes. Proper FBSEL connection selects the relative level of current feedback to voltage feedback, which results in an AC load-regulation error of either 1% or 2% of the output voltage (Table 1). The 2% setting is automatically selected in preset output voltage mode (FBSEL connected to VCC or unconnected). This gain setting minimizes the size and cost of the output filter capacitor required. For extremely tight specifications that cannot tolerate 2% short-term errors, connect FBSEL to ground (adjustable mode) for 1% AC load regulation. (See Input and Output Filter Capacitors (C1, C2) section.)
Table 1. Output Voltage Selection
FBSEL PIN IN Unconnected GND VREF AC LOAD REGULATION (%) 2 2 1 2 OUTPUT VOLTAGE (V) 2.525 3.33 Adjustable Adjustable
Integrator Amplifier (COMP)
An internal transconductance amplifier fine tunes the output DC accuracy. The transconductance amplifier is compensated at COMP. A capacitor from COMP to ground determines the gain-bandwidth product and the overall loop response. This integrator effectively eliminates any long-term error within the time constant set by the Gm of the transconductance amplifier and the capacitor connected to COMP. For stability, choose COMP as follows: CCOMP where Gm = 9.1 . Gm
Synchronous Rectification
Synchronous rectification improves efficiency by 3% to 5% at heavy loads when compared to a conventional Schottky rectifier. To prevent cross-conduction or "shootthrough," the synchronous rectifier turns on following a short delay (dead time) after the P-channel power MOSFET turns off. In discontinuous (light-load) mode, the synchronous rectifier switch turns off as the inductor current approaches zero. The synchronous rectifier works under all operating conditions, including Idle Mode.
RLOAD COUT
4
8
_______________________________________________________________________________________
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches
LX VOUT R2
MAX1623
PGND GND FB R1 = 10k to 500k R2 = R1(VOUT / VREF - 1) VREF = 1.1V
f = desired switching frequency during continuous inductor current VPCH = the voltage drop across the internal P-channel switch VNCH = the voltage drop across the internal N-channel synchronous rectifier Switching frequency decreases as load current is decreased below the 625mA Idle Mode trip point.
MAX1623
R1
Internal Reference
The 1.10V internal reference (available at REF) is accurate to 1.5% over the -40C to +85C operating range, making it useful as a precision system reference. Bypass the reference to ground with a minimum 0.1F ceramic capacitor. For low noise and jitter performance, use a 0.47F ceramic capacitor. The reference can supply up to 10A for external loads. However, if tight accuracy specifications for either reference or the main output are essential, avoid reference loads in excess of 5A. Loading the reference reduces the main output voltage slightly, according to the reference-voltage load-regulation error.
Figure 3. Adjustable Output Voltage
A high capacitor value maintains a constant average output voltage but slows the loop response to changes in output voltage. A low capacitor value speeds up the loop response to changes in output voltage. Choose the capacitor value that results in optimal performance.
Current Limiting
The current-sense circuit enables when the PMOS power switch is on. This circuit's corresponding output voltage feeds three separate comparators: the skip current comparator (1.25A), the maximum current comparator (4.15A), and the PWM current comparator (see Modes of Operation section).
Start-Up
To prevent the MAX1623 from false output regulation, the internal PMOS and NMOS switches will not switch on until all of the following conditions are true: the supply voltage is above the undervoltage lockout threshold, SHDN is pulled high, the internal reference voltage is at 75% of its nominal (1.1V) value, and the die temperature is below +145C. When the above conditions are satisfied, the MAX1623 will regulate the output voltage to the selected level. The MAX1623 typically starts up in 1ms for full output load.
Oscillator Frequency and Programming the Off-Time
The MAX1623 features a programmable off-time that is set by RTOFF connected from TOFF to GND. Connecting a 110k resistor from TOFF to GND achieves a 1s (nominal) off-time. The off-time is inversely proportional to RTOFF according to the formula: tOFF = RTOFF / 110k (s) tOFF is adjustable between 0.5s to 4s (see Typical Operating Characteristics). To set the switching frequency when the inductor operates in continuous-conduction mode, the off-time has to be set to: t OFF = VI f (VI
-
Thermal Shutdown and Overload Conditions
Thermal overload protection limits the MAX1623's total power dissipation. When the junction temperature reaches Tj = +145C, the device turns off, allowing it to cool down. Switching resumes after the IC's junction temperature decreases by 20C. If the thermal overload condition persists, the output pulses on and off. Thermal overload protection is designed to protect the MAX1623 during fault conditions, such as an output short circuit.
VO
-
- VPCH
VPCH + VNCH )
where: tOFF = the programmed off-time VI = input voltage VO = output voltage
Thermal Resistance
Junction to ambient thermal resistance (JA) strongly depends on the amount of copper area immediately surrounding the IC's leads. The MAX1623 evaluation kit has 0.8in2 of copper area. JA on this board was measured to have 45C/W of thermal resistance with no air
9
_______________________________________________________________________________________
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches MAX1623
flow. A copper area of 0.4in2 showed thermal resistance of 60C/W. Airflow over the IC can significantly reduce JA.
Table 2. Suggested Values (VIN = 5V, IO = 3A, f = 300kHz)
VOUT (V) 3.3 2.5 1.8 1.5 1.1 TOFF (s) 1.10 1.67 2.16 2.38 2.68 RTOFF (k) 120 180 240 260 280 L (H) 4.7 4.7 4.7 3.9 3.3
Power Dissipation
The MAX1623's power dissipation consists mostly of conduction losses in the two internal power switches. Power dissipation due to supply current in the control section and average current used to charge and discharge the gate capacitance of the two power switches is less than 30mW at 300kHz. This number is reduced when switching frequency is reduced as the part enters Idle Mode. Combined conduction loss in the two power switches is calculated by: PD = ILOAD2 (RON) where RON = 100m (max). The JA required to deliver this amount of power is calculated by: JA = (TJ(MAX) - TA(MAX)) / PD where: TJ(MAX) = maximum allowed junction temperature TA(MAX)= maximum ambient temperature expected
The peak inductor current at full load is 1.15 * IOUT if the above equation is used; otherwise, the peak current can be calculated by: IPEAK = IOUT + VOUT (VIN(MAX) - VOUT ) 2
f L VIN(MAX)
Applications Information
Inductor L1
The inductor value can be adjusted to optimize the design for size, cost, and efficiency. Three key inductor parameters must be specified: inductance value (L), peak current (IPEAK), and DC resistance (RDC). The following equation includes a constant, denoted as LIR, which is the ratio of inductor peak-to-peak AC current to DC load current. A higher value of LIR allows smaller inductance, but results in higher losses and ripple. A good compromise between size and losses is found at a 30% ripple current to load current ratio (LIR = 0.3), which corresponds to a peak inductor current 1.15 times the DC load current: L= where: f = switching frequency IOUT = maximum DC load current LIR = ratio of AC to DC inductor current, typically 0.3 VOUT (VIN(MAX) - VOUT ) VIN(MAX) f (IOUT ) (LIR)
The inductor's DC resistance is a key parameter for efficiency and must be minimized, preferably to less than 25m at IOUT = 3A. To reduce EMI, use a shielded inductor.
Input and Output Filter Capacitors (C1, C2)
Use a low-ESR input capacitor according to the input ripple-current requirements and voltage rating. V OUT VIN - VOUT IRIPPLE = ILOAD VIN
(
)

In addition to C1, place a 10F ceramic bypass capacitor from the power input (pin 2, 4, 6) to power ground (pin 15, 17, 19) within 5mm of the IC. The output filter capacitor determines the output voltage ripple and output load-transient response, as well as the loop's stability. The output ripple in continuous-conduction mode is: VOUT(RPL) = IOUT(MAX)
LIR ESRC2
+
2
1 f C2
where f is the switching frequency.
10
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3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches
Loop Stability
Stable operation requires the right output filter capacitor. When choosing the output capacitor, ensure the following conditions are met: V C2 80 t OFF REF VOUT and 10m RESR, C2 50m 2) A ground plane is essential for optimum performance. In most applications, the circuit will be located on a multilayer board, and full use of the four or more copper layers is recommended. Use the top and bottom layers for interconnections and the inner layers for an uninterrupted ground plane. 3) Place the LX node components as close together as possible. This reduces resistive and switching losses and confines noise due to ground inductance. 4) Connect the input filter capacitor less than 10mm away from IN. The connecting copper trace carries large currents and must be at least 2mm wide, preferably 5mm. 5) Connect GND directly to PGND at only one point near the IC.
MAX1623
Circuit Layout and Grounding
Good layout is necessary to achieve the intended output power level, high efficiency, and low noise. Good layout includes the use of a ground plane, appropriate component placement, and correct routing of traces using appropriate trace widths. For heatsinking purposes, copper area connected at the IC should be evenly distributed among the high-current pins. 1) Minimize high-current ground loops. Connect the input capacitor's ground, output capacitor's ground, and IC PGND together.
___________________Chip Information
TRANSISTOR COUNT: 1220
______________________________________________________________________________________
11
3A, Low-Voltage, Step-Down Regulator with Synchronous Rectification and Internal Switches MAX1623
________________________________________________________Package Information
SSOP.EPS
12
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